Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular chip input/output means
Patent
1997-09-02
1999-01-12
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular chip input/output means
257620, H01L 2710
Patent
active
058594485
ABSTRACT:
A method for providing a triangularly shaped I/O region on the periphery of an integrated circuit in order to reduce the amount of unused surface area on the integrated circuit is disclosed. A core region within the triangularly shaped I/O region may be either triangularly shaped or rectangularly shaped, and may include one or more metallization lines routed in a direction parallel to at least one edge of the triangularly shaped I/O region on the periphery of the integrated circuit. Alternatively, the core region may include one or more metallization lines routed in a direction parallel to at least one edge of the triangularly shaped peripheral I/O region, as well as one or more other metallization lines routed in a direction perpendicular to at least one edge of the triangularly shaped peripheral I/O region. A plurality of I/O slots located in the triangularly shaped I/O region may be triangularly, trapezoidally, or rectangularly shaped.
REFERENCES:
patent: 4789889 (1988-12-01), Morris et al.
patent: 5300796 (1994-04-01), Shintani
patent: 5341024 (1994-08-01), Rostoker
patent: 5444303 (1995-08-01), Greenwood et al.
Hardy David B.
Jackson Jerome
Sun Microsystems Inc.
LandOfFree
Alternative silicon chip geometries for integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Alternative silicon chip geometries for integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Alternative silicon chip geometries for integrated circuits will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1519204