Alternating-current plasma display panel

Details Alternating-current plasma display panel Alternating-current plasma display panel

2000-07-20

2002-12-31

Patel, Ashok (Department: 2879)

Electric lamp and discharge devices

With gas or vapor

Three or more electrode discharge device

C313S585000

Reexamination Certificate

active

06501221

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an alternating-current plasma display panel (ACPDP), and more particularly, to a three-electrode surface-discharge ACPDP.
2. Description of the Related Art
FIG. 1
shows a structure of a general three-electrode surface-discharge ACPDP,
FIG. 2
shows an electrode line pattern of the PDP shown in
FIG. 1
, and
FIG. 3
shows an example of a pixel of the PDP shown in FIG.
1
. Referring to the drawings, in a general three-electrode surface-discharge ACPDP
1
, address electrode lines A
1
, A
2
, A
m
, dielectric layers
11
and
15
, scan electrode lines Y
1
, Y
2
, Y
n
, common electrode lines X
1
, X
2
, X
n
, phosphors
16
, partition walls
17
and a MgO protective film
12
are located between front and rear glass substrates
10
and
13
.
The address electrode lines A
1
, A
2
, A
m
, are arranged over the front surface of the rear glass substrate
13
in a predetermined pattern. The lower dielectric layer
15
covers the entire front surface of the address electrode lines A
1
, A
2
, A
m
. The partition walls
17
are located on the front surface of the lower dielectric layer
15
parallel to the address electrode lines A
1
, A
2
, A
m
. The partition walls
17
partition discharge areas of the respective pixels and prevent cross talk among the respective pixels. The phosphors
16
are coated between the partition walls
17
.
The common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
are arranged on the rear surface of the front glass substrate
10
orthogonal to the address electrode lines A
1
, A
2
, A
m
, in a predetermined pattern. The respective intersections define corresponding pixels. The common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
each comprise indium tin oxide (ITO) electrode lines X
na
and Y
na
, and a metal bus electrode lines X
nb
and Y
nb
, as shown in FIG.
3
. The upper dielectric layer
11
is entirely coats the rear surface of the common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
. The MgO protective film
12
for protecting the panel
1
against strong electrical fields entirely coats over the rear surface of the dielectric layer
11
. A gas for forming plasma is hermetically sealed in a discharge space.
The driving method generally adopted for the PDP described above is an address/display separation driving method in which a reset step, an address step and a sustain discharge step are sequentially performed in a unit sub-field. In the reset step, wall charges remaining from the previous sub-field are erased. In the address step, the wall charges are formed in a selected pixel area. Also, in the sustain discharge step, light is produced at the pixel at which the wall charges are produced in the address step. In other words, if alternating pulses of a relatively high voltage are applied between the common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
, a surface discharge occurs at the pixel at which the wall charges are located. Here a plasma is formed at the gas layer of the discharge space
14
and the phosphors
16
are excited by ultraviolet light and thus emit light.
In the above-described plasma display panel
1
, conventionally, the common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
are all a rectangular solid.
FIG. 4
shows the common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
of the conventional three-electrode surface-discharge alternating-current plasma display panel. In
FIG. 4
, reference numeral
10
denotes a front-surface glass substrate. Referring to
FIG. 4
, the respective common ITO electrode lines X
1a
, X
2a
, X
na
have the same cross-section area, irrespective of their lengthwise positions. Accordingly, the cross-sectional resistance values of the common ITO electrode lines X
1a
, X
2a
, X
na
are the same at any lengthwise position. The same structural and electrical characteristics are also applied to common bus electrode lines X
1b
and Y
nb
, scan ITO electrode lines Y
1a
, Y
2a
, Y
na
and scan bus electrode lines Y
1b
, Y
2b
, Y
nb
.
In to the aforementioned conventional electrode line structure, the farther from the input terminals of driving signals, the lower the driving voltages become, because of a voltage drop due to line resistance. Thus, since the amounts of discharged current flowing in the common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
are different according to their lengthwise positions, the luminance of the display is not uniform. This phenomenon can be somewhat improved by constructing the electrode line structure such that the positions C
X
of input terminals to which driving signals corresponding to the common electrode lines X
1
, X
2
, X
n
are opposite to the positions C
Y
of input terminals to which driving signals corresponding to the scan electrode lines Y
1
, Y
2
, Y
n
are applied. In other words, the luminance of the display at the respective positions with respect to average time can be made uniform utilizing the characteristic of alternating-current driving.
However, the amounts of discharged current are relatively small at the central positions C
M
. . . , the common electrode lines X
1
, X
2
, X
n
and the scan electrode lines Y
1
, Y
2
, Y
n
, thereby lowering luminance.
SUMMARY OF THE INVENTION
To solve the above problem, it is an objective of the present invention to provide an alternating-current plasma display panel (ACPDP) which can improve a picture quality by providing uniform luminance of the display throughout the screen.
Accordingly, to achieve the above objective, there is provided an alternating-current plasma display panel having common electrode lines, scan electrode lines and address electrode lines arranged between first and second substrates opposite to and spaced apart from each other, the common electrode lines being arranged parallel to the scan electrode lines, the address electrode lines being arranged orthogonally to the common electrode lines and the scan electrode lines, to define corresponding pixels at the respective intersections, wherein the positions of input terminals to which driving signals corresponding to the common electrode lines are opposite to the positions of input terminals to which driving signals corresponding to the scan electrode lines, and the top plane areas of the respective common bus electrode lines and the respective scan bus electrode lines are gradually increased toward the corresponding input terminals.
In the ACPDP according to the present invention, the cross-sectional resistance values of the respective common electrode lines and the respective scan electrode lines are decreased toward the corresponding input terminals. In other words, when a voltage is applied to the corresponding input terminals, the amount of current flowing between the input terminals and the central positions is maximized. Accordingly, the amounts of discharged current and the luminance at the central positions of the common electrode lines and the scan electrode lines can be relatively increased, thereby improving the picture quality because of the uniform luminance of the display for the overall screen.


REFERENCES:
patent: 4437037 (1984-03-01), Harbey
patent: 5742122 (1998-04-01), Amemiya et al.
patent: 6097149 (2000-08-01), Miyaji et al.
patent: 1433665 (1976-04-01), None
patent: 10-241577 (1998-09-01), None

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