Alternating application of pulses on two sides of a cell

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185030, C365S185240

Reexamination Certificate

active

06975541

ABSTRACT:
A method for operating on bits of a memory cell, the method comprising providing a memory cell that has two separated and separately chargeable areas on first and second sides of the cell, each chargeable area defining one bit, applying an injection pulse and a verify pulse on the first side of the cell, and before the first side of the cell has reached a verify level, applying an injection pulse and a verify pulse on the second side of the cell.

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patent: 6307784 (2001-10-01), Hamilton et al.
patent: 6320786 (2001-11-01), Chang et al.
patent: 6348711 (2002-02-01), Eitan
patent: 6396741 (2002-05-01), Bloom et al.
patent: 6614692 (2003-09-01), Eliyahu et al.
patent: 6643170 (2003-11-01), Huang et al.
patent: 6643181 (2003-11-01), Sofer et al.
patent: 2002/0159293 (2002-10-01), Hamilton et al.
European Search Report for EP 04 007003.

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