Alternately selecting memory units to store and retrieve...

Electrical computers and digital processing systems: processing – Processing architecture – Array processor

Reexamination Certificate

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Details

C712S016000

Reexamination Certificate

active

07849288

ABSTRACT:
A reconfigurable circuit and control method therefor, capable of enhancing efficiency of implementation of a pipeline process in processing elements and improve processing performance. Processing elements are reconfigured to form a circuit based on configuration information and execute a prescribed process. Memory units store configuration information for the processing elements. A memory switching unit switches the plurality of memory units to store therein the configuration information on the stages of a pipeline process to be performed by the processing elements. A configuration information output unit switches the memory units to output therefrom the configuration information to the plurality of processing elements.

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Herman Schmit, “Incremental Reconfiguration for Pipelined of Applications”, Proceedings of the IEEE Symposium on FPGAs Custom Computing Machines (FCCM), 1997, pp. 47-55, Pittsburgh, PA.

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