Alternate timing signal for a vestigial sideband modulator

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

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Details

C375S294000, C375S327000, C348S608000, C348S725000

Reexamination Certificate

active

06940936

ABSTRACT:
A remodulator timing signal (35) is generated by a phase locked loop (33) which is coupled to a broadcast vestigial sideband signal (5). Within the signal (5) is highly accurate timing data which is coupled to a demodulator (31). Timing signals to the demodulator are provided by a variable frequency oscillator (32) which receives a correction signal from a phase locked loop (33) housed within the demodulator. The phase locked loop generates the correction signal by comparing the VFO output frequency (36) with the timing data embedded within the broadcast signal (5). A value register (203,303,403) maintains the recent average VFO frequency. A multiplexer (204,304,404) selects the value register data to control the VFO (32,220,320) in the absence of the broadcast timing data.

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patent: WO 01/50757 (2001-07-01), None
J. Bao, et al., entitled “A New Timing Recovery Method for DTV Receivers”, 1998 IEEE, dated Jun. 25, 1998, pp. 1243-1249.

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