Alternate memory addressing for information storage and retrieva

Details Alternate memory addressing for information storage and retrieva Alternate memory addressing for information storage and retrieva

1987-03-18

1989-10-17

Shaw, Gareth D.

Boots, shoes, and leggings

36518904, 36523004, 3642281, 3642472, G06F 1200

Patent

active

048751570

ABSTRACT:
An apparatus for alternate memory addressing of a random access memory (RAM) allows a first processor to write into the memory on a row-by-row basis and a second processor to read out of the memory on a column-by-column basis. The memory is typically divided into a pluralilty of channels into which the first processor writes data for respective channels asynchronously by the use of twin RAMs. While one RAM is written to by the first processor, the second RAM is read from synchronously with automatic address translation.

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