All rate bit synchronizer with automatic frequency ranging

Details All rate bit synchronizer with automatic frequency ranging All rate bit synchronizer with automatic frequency ranging

1981-04-23

1983-03-01

Safourek, Benedict V.

Pulse or digital communications

Spread spectrum

Direct sequence

328155, 331 11, H03L 706

Patent

active

043756948

ABSTRACT:
A bit synchronizer capable of operation over all frequencies, limited only by the speed of the integrated circuits and other components. The input data can be any random antipodal data. A programmable scaling circuit allows the operator to select the desired half octave range of operation. Half octaves can be scanned automatically by the autorange feature of the invention. An acquisition circuit sweeps over the selected half octave, diverting frequency correction pulses in order to sweep a voltage controlled oscillator (VCO). Lock is recognized when a preselected number of data transitions with phase error below a preset maximum occur consecutively. A second order phase lock loop (PLL) provides both phase and frequency correction.

REFERENCES:
patent: 3646452 (1972-02-01), Horowitz et al.
patent: 3781695 (1973-12-01), Jackson
patent: 3959601 (1976-05-01), Olevsky et al.
patent: 4019153 (1977-04-01), Cox, Jr. et al.
patent: 4031317 (1977-06-01), McClain et al.
patent: 4122405 (1978-10-01), Tietz et al.
patent: 4131862 (1978-12-01), Black et al.
patent: 4210776 (1980-07-01), VanMeter
patent: 4259740 (1981-03-01), Snell et al.
Bellisio, J. A., "A New Phase Locked Timing Recovery Method for Digital Regenerators", IEEE, International Conference on Communications, Jun. 1976, Philadelphia, Pa., pp. 10-17 et seq.

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