Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2002-06-05
2004-08-31
Mottola, Steven J. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S260000
Reexamination Certificate
active
06784734
ABSTRACT:
FIELD OF THE INVENTION
The present invention is generally related to operational amplifiers, and more particularly to operational amplifiers having positive feedback.
BACKGROUND OF THE INVENTION
High gain, accuracy, and high speed are the most important properties of analog circuits. A variety of analog and mixed signal systems have performance that is limited by the settling behavior of a CMOS amplifier. These include switched capacitor filters, Algorithmic A/D converters, sigma-delta converters, sample and hold circuits, and pipeline A/D converters. The settling behavior of the Op-Amp determines the accuracy and the speed that can be reached. Fast settling requires single pole settling behavior, and a high gain-bandwidth-product. High accuracy requires high DC gain.
The task of building a fast Op-Amp with very high DC-gain is a very difficult problem. The high unity gain frequency, high speed, calls for single stage design with short channel devices biased with high current levels. The high DC-gain Op-amp can be implemented by one or more of the following techniques. These techniques include are cascading of gain stages, applying dynamic biasing technique, or using output impedance enhancement technique. Cascading two stages or more may result in a very high DC-gain. However, proper compensation for stable operation will seriously limit the high frequency performance. The second method, dynamic biasing technique, combines high DC gain and fast settling speed. However, in dynamically biased amplifiers, and during the last settling period, transistors turn into weak inversion region which dramatically slows the settling. Dynamically biased amplifiers have limited acceptance because of this disadvantage. Moreover, a single stage dynamically biased amplifier may not provide sufficient gain, and cascading them is very difficult. The third method of enhancing amplifier DC-gain is to increase its output impedance. This task can be performed either by cascoding, stacking of transistors at the output node, using gain-boosting technique, or by using the negative conductance, positive feedback method. Cascoding is a well-known method to enhance amplifier output impedance, where the amplifier output impedance, gain, becomes proportional to the square, or the cube of the intrinsic transistor gain, g
m
/g
o
. One level of cascoding doesn't provide sufficient DC-gain. A triple cascoded amplifier has a very limited output swing, and is not applicable to low-voltage circuits. Moreover, as we go deep in sub-micron processes, the intrinsic transistor resistance becomes smaller and smaller which limits the advantage of cascoding.
Enhancing amplifier gain by the gain-boosting technique is one of the most successful ways of boosting amplifier gain without limiting the high frequency performance. However, boosting amplifiers add their own poles and zeros to the final amplifier, which in general will exhibit zero-pole doublets that affect amplifier settling making it slow. As the industry moves toward using the new digital CMOS processes, Cascading, Cascoding, and Gain-boosting techniques loose their ability to provide very high DC gain amplifiers because digital transistors have a high output conductance. Expensive solutions like using the special analog friendly devices are used most of the time.
The final method to boost the gain is using the positive feedback technique, negative conductance. Positive feedback offers the ability of obtaining a very high DC gain, ideally infinite gain, without affecting high frequency performance. However, most of the conventional positive feedback implementations have suffered from two problems. First, a strong dependence of amplifier gain on transistor matching. Second, a strong gain sensitivity to output signal swing. Since a wide swing operation, is desired the DC gain of the amplifier will drop sharply as the output node swings up or down, and this problem is not mentioned in the literature. However, the positive feedback method still holds potential to build fast amplifiers with high DC gain.
SUMMARY OF THE INVENTION
The present invention achieves technical advantages as an operational amplifier having positive feedback provided to a standard telescopic cascoded amplifier. Self-adjusting feedback, in combination with cascoding, provides the technical advantages of allowing transistor matching requirements to be relaxed. The positive feedback signal used to enhance the DC-gain is derived from extra nodes created by cascoding. The configuration of the present invention considerably reduces the effect of the output voltage level swing on the amplifier gain. Moreover, the present invention achives high gain and output swing even when using only digital transistors. This implementation results in smaller amplifier silicon area compared to amplifiers implemented using special analog transistors. Smaller devices will result in faster response for the same power budget.
The positive feedback signal experiences very small swings compared to the output differential voltage swings, therefore, the positive feedback is almost unaffected by the output voltage signal level swing. In this design, the positive feedback is active in the differential mode, and is a negative feedback in the common mode. Since the gain is dependent on the biasing parameters, the negative feedback helps the amplifier to maintain the high DC gain condition once it is in this state.
REFERENCES:
patent: 5272395 (1993-12-01), Vincelette
patent: 5345346 (1994-09-01), Brannon et al.
Brady W. James
Mottola Steven J.
Swayze, Jr. W. Daniel
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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