All digital phase locked loop system and method

Details All digital phase locked loop system and method All digital phase locked loop system and method

2007-01-17

2009-10-20

Lee, Benny (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

Tuning compensation

C331S017000, C327S156000

Reexamination Certificate

active

07605664

ABSTRACT:
An all digital PLL system generates an analog oscillator signal at intermediate frequencies to achieve averaged oscillator frequencies at an extremely high frequency resolution. The PLL system includes a digitally controlled oscillator (10) with a digital control input and an analog signal output, and a feedback loop with a digital loop filter (16) for generating a digital control signal for the digitally controlled oscillator (10). The digital loop filter (16) has a first output providing an integer part (nint) of the digital control signal and a second output providing a fractional part (nΣΔ) of the digital control signal. A sigma-delta modulator (14) has an input connected to the second output of the digital loop filter (16) and an output providing a one-bit digital output signal (ΣΔ), and a digital adder (12) has a first input connected to the first output of the digital loop filter (16), a second input connected to the output of the sigma-delta modulator (14), and an output connected to the digital control input of the digitally controlled oscillator (10). The output of the sigma-delta modulator (14) modulates the least significant bits from the first output of the digital loop filter (16).

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