All digital implementation of clock spectrum spreading...

Details All digital implementation of clock spectrum spreading... All digital implementation of clock spectrum spreading...

2007-05-22

2007-05-22

Patel, Jay K. (Department: 2611)

Pulse or digital communications

Testing

Phase error or phase jitter

C375S225000, C375S227000, C375S228000, C375S130000, C331S017000

Reexamination Certificate

active

11246328

ABSTRACT:
A digital circuit configured to spread a clock train spectrum includes a clock configured to generate the clock train, and a variable divider configured to divide the frequency of the clock train by a temporally-varying-divider value to modulate the clock train and generate a dithered clock train. The circuit further includes a first accumulator configured to accumulate the dithered clock train to generate a frequency modulation waveform, and a second accumulator configured accumulate the frequency modulated waveform to generate a phase modulation signal. The circuit further includes a phase-value calculator configured to calculate the temporally-varying divider value based on the phase modulation signal; and a closed-loop control circuit configured to track and filter the modulation of the dithered clock train to generate a second clock train that is the spread spectrum of the first mentioned clock train.

REFERENCES:
patent: 5920555 (1999-07-01), Hulbert
patent: 6044124 (2000-03-01), Monahan et al.
patent: 6650719 (2003-11-01), Baker
patent: 7006589 (2006-02-01), Staszewski et al.
patent: 2004/0161047 (2004-08-01), Liu et al.
patent: 2005/0286670 (2005-12-01), Jungerman
patent: 2006/0233291 (2006-10-01), Garlepp et al.

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