All CMOS GPS receiver with noise-matched high impedance...

Details All CMOS GPS receiver with noise-matched high impedance... All CMOS GPS receiver with noise-matched high impedance...

2005-09-01

2008-10-14

Nguyen, Lee (Department: 2618)

Telecommunications

Receiver or analog modulated signal frequency converter

Frequency modifying or conversion

C455S280000, C342S357490

Reexamination Certificate

active

07437138

ABSTRACT:
A GPS receiver depends on CMOS technology for both its GPS digital signal processing (DSP) and radio frequency (RF) stages. A resulting increase in RF input noise generated by the CMOS RF input is overcome by placing the antenna on-chip or on a lid of an application specific integrated circuit (ASIC) that includes the DSP and RF stages, and matching it for the best noise figure rather than the best impedance match. The on-chip antenna is matched to the natural high impedance of the CMOS RF input without requiring matching networks that can attenuate already weak signals. Using CMOS technology for both the GPS DSP and RF stages eliminates the need for level shifts between what would otherwise be a 3-volt RF section and a 1.2-volt DSP section.

REFERENCES:
patent: 7088964 (2006-08-01), O
patent: 7235880 (2007-06-01), Prokofiev
patent: 2002/0196181 (2002-12-01), Fall
EECS 522 Analog Integrated Circuits Project, Winter 2002; “A 1.9 GHz Low Noise Amplifier”, by Jerome Le Ny, Bhavana Thudi and Jonathan McKenna.
Thesis: “An Investigation of On-Chip Antenna Characteristics Related to Energy Harvesting Applications” by Dmitry Gorodetsky, University of Pittsburgh, 1999.
Optotek,Ltd. (Ottawa, Ontario, Canada) Application Note 34, “Amplifier Load Mismatch Design Using MMICAD” by D. Fitzpatrick.
CommsDesign Article Wireless Transceiver-on-Chip Now Possible, by R. Colin Johnson, Aug. 3, 2004.

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