Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2001-09-10
2003-12-16
Wong, Edna (Department: 1753)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C205S170000, C205S184000, C205S157000, C205S102000, C205S123000, C438S584000
Reexamination Certificate
active
06664633
ABSTRACT:
The invention relates generally to the field of integrated circuit fabrication and, in particular, to improved metallization methods useful in the production of semiconductor devices.
BACKGROUND
During the manufacture of integrated circuits, such as semiconducting devices, various conductive and insulative layers of material are deposited on a substrate to provide circuits and interconnects between the circuits. As integrated circuits continue to shrink in size and become more powerful, newer and better manufacturing techniques are devised to improve their performance.
For example, current copper metallization schemes include providing features such as trenches, slots, vias or holes in a semiconductor substrate, depositing a barrier layer in the features, depositing a seed layer on the barrier layer and depositing copper from an electrochemical deposition acid bath to fill the various features. In order to achieve suitable electrical performance of the semiconductor device, adhesion between the electrochemical deposition copper and the barrier layer is desired. A continuous physical vapor deposited seed layer typically provides suitable adhesion between the barrier layer and the electroplated copper layer.
However, the seed layer often has poor step coverage, particularly for high aspect ratio features and tends to be oxidized to copper oxide upon exposure to air. The oxide layer may be as thick as sixty angstroms or more. Upon submersion of the device in an acidic copper electroplating bath, the copper oxide layer tends to be removed by the acidic bath solution, leaving a thinner or nonexistent seed layer. For features having high aspect ratios and width dimensions of a tenth of a micron or less, conventional seed layers having five percent to ten percent step coverage will typically not work, because the features are effectively closed off by such a thick seed layer. A thinner seed layer, however, tends to be insufficient to provide suitable seed layer coverage of the feature sidewalls once the oxide layer is removed by the electroplating bath.
Thus, there continues to be a need for improved methods for electroplating features with metal on a substrate.
SUMMARY
The above and other needs are met by a method for depositing a metal conduction layer in a feature of a semiconductor device. The method includes the steps of forming a feature in a semiconductor substrate, where the feature has a width dimension of less than about a tenth of a micron. A barrier layer is deposited on a substrate using a self ionized plasma deposition process, the barrier layer having a thickness of no more than about three hundred angstroms. A seed layer is deposited on the barrier layer, where the seed layer has a thickness of less than about three hundred angstroms to provide a substantially continuous seed layer. The conduction layer is electroplated on the seed layer from an alkaline electroplating bath, where the electroplating bath contains an electroplating solution selected from the group consisting of a pyrophosphate solution, an alkaline cyanide solution and an alkaline metal ion complexing solution.
In another aspect the invention provides a method for electroplating a semiconductor device including the steps of depositing a barrier layer on a substrate using a self ionized plasma deposition process, where the barrier layer has a thickness of no more than about three hundred angstroms. A seed layer is deposited on the barrier layer to provide a seed layer having a thickness ranging from about two hundred angstroms to about three hundred angstroms. A conduction layer is electroplated on the seed layer to provide an electroplated semiconductor device, wherein the electroplating bath has a pH above about seven.
An advantage of the invention is that a metal such as copper may be deposited on a substrate in features which have a width dimension of less than about one tenth of a micron and high aspect ratios. Acidic electroplating solutions are unsuitable for depositing conduction metals in extremely narrow features because the acidic solutions tend to dissolve the metal oxide layer formed from the seed layer, which for narrow features with high aspect ratios may include the entire seed layer, thereby providing “holes” or seed layer deficient areas on the side walls of the features.
Providing a seed layer thickness sufficient to prevent holes prior to depositing the electroplated metal often results in a seed layer thickness that effectively closes off the feature because of the poor step coverage of the seed layer. In contrast, use of an alkaline electroplating solution enables the use of a thinner seed layer which is not removed during the electroplating process. The alkaline solution may also be effective to reduce any metal oxide of the seed layer to the pure metal, thereby further enhancing the seed layer.
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Hosoi et al., “Two-step Copper Electroplating Technique Using Seed Enhancement Step with Alkali-Metal-Free Copper Pyrophosphate Bath,” Proceedings of the International Interconnect Technology Conference, Jun. 2001.
LSI Logic Corporation
Luedeka Neely & Graham
Wong Edna
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