Alignment or overlay marks for semiconductor processing

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S401000, C438S462000, C438S975000

Reexamination Certificate

active

06888260

ABSTRACT:
An alignment or overlay mark with improved signal to noise ratio is disclosed. Improved signal-to-noise ratio results in greater depth of focus, thus improving the performance of the alignment mark. The alignment mark comprises a zone plate having n concentric alternating opaque and non-opaque rings. Light diffracted by either the odd or even rings are cancelled while light diffracted by the other of the odd or even rings are added.

REFERENCES:
patent: 4037969 (1977-07-01), Feldman et al.
patent: 4178701 (1979-12-01), Sadler
patent: 4326805 (1982-04-01), Feldman et al.
patent: 4545683 (1985-10-01), Markle
patent: 4614433 (1986-09-01), Feldman et al.
patent: 5319444 (1994-06-01), Saitoh et al.
patent: 5877562 (1999-03-01), Sur et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Alignment or overlay marks for semiconductor processing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Alignment or overlay marks for semiconductor processing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Alignment or overlay marks for semiconductor processing will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3456698

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.