Alignment of sign, data, edit byte operand results for storage i

Details Alignment of sign, data, edit byte operand results for storage i Alignment of sign, data, edit byte operand results for storage i

1992-09-01

1994-01-04

Shaw, Dale M.

Boots, shoes, and leggings

364736, 3647365, G06F 700

Patent

active

052768910

ABSTRACT:
The arithmetic processor of a digital computer system has means for performing, on its output operands while they are in transit to memory for storage, such manipulations as operand alignment, conversions between packed and zoned format, insertion of signs, and insertion of predetermined characters for edit functions. Two registers are provided, each having a capacity equal to that of a memory word. Each register is provided with segmented input selection means for selecting from among calculation results, residual data retained from operand fetching, signs, and constants. The two registers are OR'd together to produce desired words for storage in the system's memory.

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patent: 4849882 (1989-07-01), Aoyama et al.
patent: 5019969 (1991-05-01), Izumisawa et al.

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