Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask
Reexamination Certificate
2001-06-07
2003-08-26
Young, Christopher G. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Radiation modifying product or process of making
Radiation mask
C430S022000, C430S030000
Reexamination Certificate
active
06610448
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based on and claims the benefit of priority from the prior Japanese Patent Application No. 2000-172077, filed Jun. 8, 2000, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to an alignment method for precisely overlaying photomasks used in lithography steps performed in manufacturing of semiconductor devices, a pattern-overlay inspection method, and a photomask used in these methods.
In the conventional method of manufacturing a semiconductor device, a semiconductor wafer is exposed to lights having mask patterns exceeding 20 patterns to overlay the mask patterns successively on the semiconductor wafer for forming finally a plurality of device patterns on the semiconductor wafer. When the pattern exposure is performed, the positioning of a photomask in an exposure apparatus is performed according to an alignment mark formed in advance on the photomask. After the positioning is fixed, the pattern exposure is performed to form a resist pattern on a chip of the semiconductor wafer for correctly overlaying the resist pattern on a pattern formed in advance within the chip.
The pattern-overlay inspection is then performed on the basis of the resist pattern and the pattern formed in advance on the chip so as to inspect whether a device pattern to be formed is correctly overlaid on the device pattern formed in advance on the chip.
It was customary in the past to inspect the overlay deviation of the alignment by forming inspection marks with given sizes and shapes for inspecting the overlay deviation of the alignment on first and second layers of wires, for example, on a silicon wafer. Then the formed marks are used in the measuring step for obtaining the deviation amount of the relative positions of the overlay inspection marks with an inspecting apparatus. In this case, since the inspection marks for inspecting the overlay deviation of the alignment were designed to have a size and shape that could be easily recognized by the inspecting apparatus, it was customary in the past to use the particular mark differing from the device pattern in size and shape.
FIG. 8
is a plan view showing typical conventional inspection marks for inspecting the deviation of alignment formed on the wafer together with a device pattern. The inspection marks include inner four marks
101
and outer four marks
102
. The outer marks
102
are arranged to have a pitch of 28 &mgr;m as shown in the figure. Therefore, each of the outer marks
102
has a length slightly shorter than 28 &mgr;m.
The inspection marks
101
are formed in advance in the first layer of wires on the wafer, for example, and the inspection marks
102
are then formed on a second layer of wires on the first layer of wires to have an arrangement as shown in FIG.
8
. The deviation of alignment can be inspected by obtaining a subtraction of a measured distance between the neighboring marks
101
and
102
and a reference distance, for example.
However, with progress in miniaturization of the device pattern achieved in recent years, a difficulty has arisen that, in the case where an inspection mark for inspecting the deviation of alignment and a device pattern are formed simultaneously, it is substantially impossible to form both the inspection mark and the device pattern with substantially the same degree of accuracy.
The difficulty is derived from the situation that the inspection marks for inspecting the deviation of alignment and the device pattern are not similar or equal to each other in size and shape. To be more specific, an error in the pattern position, size and shape takes place due to the aberration and focus position of the projection optical system including a projection lens in the exposure apparatus used in the lithography. In addition, the degree of the error varies depending on the shape, size and local density of the inspection marks and those of the device patterns.
It should also be noted that the working processes such as the etching and CMP (Chemical Mechanical Polishing) processes are likely to affect the degree of the error by the difference in the pattern shape and the difference in the local density of the patterns.
FIG. 9
exemplifies a device pattern formed on the wafer together with the overlay deviation inspection marks shown in
FIG. 8
, for example. As shown in
FIG. 9
, the pitch of the device pattern is 0.35 &mgr;m. Thus, the device pattern shown in
FIG. 9
is utterly different from the inspection marks shown in
FIG. 8
in shape and size.
Also, the device pattern includes in some cases patterns differing from each other in the shape, size, density, etc. even if these patterns are formed on the same layer of wires on the wafer. In such a case, a difference in the error amount in respect of the pattern position and shape takes place depending on the difference in the pattern size and shape. In order to form a precise pattern, it is desirable to measure the errors in the position, shape and size of all the device patterns. However, such a measuring means has not been developed in the past.
The similar problems are also generated in the alignment mark used for finding the alignment position of the photo-mask in the light exposure step performed by using the exposure apparatus as well as in the inspection mark for measuring the deviation of alignment. In the case of using a mark that does not resemble the device pattern as the alignment mark, a difficulty is generated that it is difficult to recognize correctly the actual device pattern position on the wafer exposed to the light.
FIG. 10
is a plan view showing the conventional alignment mark formed on a wafer. The conventional alignment mark has a pattern having a pitch of 12 &mgr;m larger than that of the device pattern shown in FIG.
9
and is shaped like an oblong band, which widely differs from the device pattern shown in
FIG. 9
in shape, size, etc.
Jpn. Pat. Appln. KOKAI No. 9-102457 discloses a means for solving the problem of an error generated from the situation that the alignment mark differs from the device pattern in shape and size. It is disclosed that the length of the alignment mark is divided into a length close to that of the device pattern. However, since the mark for inspecting the deviation of alignment and the alignment mark are designed separately from each other in the past, the inspecting mark and the alignment mark widely differ from each other in, for example, the pitch as apparent from
FIGS. 8 and 10
, resulting in failure to permit these inspecting mark and the alignment mark to be related to each other in the pattern size and shape.
This implies that the degree of the error in the pattern position taking place in the lithography and the subsequent working steps differs depending on the mark. As a result, it was difficult to measure accurately where and in what shape the device pattern formed on the basis of the alignment mark was formed so as to cause generation of the device pattern error.
As described above, the alignment mark, the mark for inspecting the deviation of alignment, and the device pattern differ from each other in the constituents of the pattern such as the pattern shape, size and density, with the result that the degrees of errors taking place in the pattern forming step differ from each other. For example, in forming a multi-layer structure by successively overlaying a first layer of wires, a second layer or wires, etc. on the wafer, it is difficult to overlay these layers of wires one upon the other with a high accuracy, thereby giving rise to a serious problem to be solved for manufacturing a semiconductor device of a multi-layer structure.
An object of the present invention is to provide an alignment method, a high accuracy overlay inspection method and a photomask used in these methods, in which both the alignment mark and the device pattern are formed so as to be affected in substantially the same degree by the error caused by the aberration of the projection optical syste
Inoue Soichi
Sato Takashi
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