Data processing: measuring – calibrating – or testing – Measurement system – Orientation or position
Reexamination Certificate
1999-02-01
2001-08-21
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Measurement system
Orientation or position
C702S094000, C702S127000, C702S159000
Reexamination Certificate
active
06278957
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an alignment method and an apparatus for determining a model equation expressing the regularity of arrangement of a plurality of processing areas on a wafer by use with, e.g., a statistic technique in order to predict an arrangement coordinate value of each of the processing areas prior to aligning each of processing areas with a predetermined position and more particularly to an alignment method and an apparatus suitable for aligning a pattern of a mask or a reticle with each of processing areas (shot areas) accurately.
2. Related Background Art
In the photolithography process for manufacturing semiconductor devices, liquid crystal display devices or the like, there are used projection exposure apparatuses, which project a pattern of a mask or a reticle (hereinafter referred to as the reticle) to each of shot areas on a sensitive substrate via a projection optical system. Recently, as such apparatuses, step and repeat type exposure apparatuses, e.g., reduction projection type exposure apparatuses (stepper) have been widely used, wherein the sensitive substrate is disposed on a two-dimensionally movable stage and the image of the pattern of the reticle is exposed on each of the shot areas on the sensitive substrate successively and repeatedly while the sensitive substrate is shifted (stepping) by the stage.
For example, in forming the conductor device, a plurality of circuit patterns are piled one over another on the sensitive substrate with a sensitive material applied thereon. Therefore, when exposing the circuit pattern on the first layer and thereafter, the pattern image of the reticle for the next exposure needs to be superposed accurately on the circuit pattern already formed on the wafer. That is, the wafer needs to be aligned with the reticle accurately. The alignment method for the wafer in the conventional stepper or the like is as follows (e.g., U.S. Pat. Nos. 4,780,617 and 4,833,621).
A plurality of shot area are arranged regularly on the wafer based on the predetermined alignment coordinate values and provided with the respective chip patterns having marks for alignment (alignment marks). However, when superposing another pattern on the pattern formed previously, even though the wafer is subjected to the stepping operation based on the predetermined arrangement coordinate values, the sufficient alignment accuracy cannot be necessarily obtained owing to the following factors.
(1) the residual rotation error of the wafer: &THgr;
(2) the rectangular degree error of the stage coordinate system (or shot arrangement): W
(3) the linear expansion or contraction of the wafer: R
x
, R
y
(4) the offset (parallel movement) of the wafer (center position): O
X
, O
Y
As these four error amounts can be expressed by six parameters, the transformation matrix A of 2 lines×2 rows including elements expressed by four parameters among those and the transformation matrix O of 2 lines×1 row including elements of the offset (parallel movement) O
X
, O
Y
are considered. And, the arrangement coordinate value upon the design (D
Xn
, D
Yn
) (n=0, 1, 2, . . . ) of the shot areas on the wafer and the arrangement coordinate values (F
Xn
, F
Yn
) for the actual alignment by the step and repeat method are expressed by use with the transformation materices A and O as follows:
[
F
Xn
F
Yn
]
=
A
[
D
Xn
D
Yn
]
+
O
(
1
)
At this time, the least squares method is used to determine the transformation matrices A and O such that the deviation between the arrangement coordinate value (FM
Xn
, FM
Yn
) actually measured from each of shot areas selected from the plurality of shot areas and the arrangement coordinate value upon calculation (F
Xn
, F
Yn
) calculated for each of the corresponding selected shot areas. Conventionally, on the basis of the determined transformation matrices A, O and the alignment coordinate upon the design (D
Xn
, D
Yn
), the arrangement value upon calculation (F
Xn
, F
Yn
) for the actual alignment position is calculated and the positions of shot areas on the wafer is determined based on the calculated arrangement coordinate value (F
Xn
, F
Yn
).
However, even though the wafer is positioned in accordance with the calculated alignment coordinate value upon calculation (F
Xn
, F
Yn
), the sufficient alignment accuracy cannot be necessarily obtained owing to the following factors.
(1) the residual rotation errors of the circuit patterns (chip pattern) of the shot areas on the wafer: &thgr;
(2) the rectangular degree error of the coordinate system (chip pattern) on the wafer: w
(3) the linear expansion or contraction of the chip pattern in the two rectangular directions: rx, ry
These are caused by the deviation or rotation of the reticle from a predetermined position, the projection magnification error of the projection optical system or the distortion of the projection optical system when the chip pattern is first (first layer) printed on each shot area on the wafer. Furthermore, these factors are changed by the distortion occuring at the time of processing the wafer.
Further, there is presented such a disadvantage that when a reticle is rotated or translated, a pattern image of the reticle and a chip pattern on a wafer cannot be precisely aligned with each other. Accordingly, as proposed in U.S. Pat. No. 4,699,515 or U.S. Pat. No. 4,052,603, two marks facing together on both sides of a circuit pattern on a reticle are detected so as to obtain a rotational error, and the reticle or a wafer is rotated so as to make the rotational error zero. Further, as proposed in U.S. patent application Ser. No. 093,725 (Jul. 20, 1993), marks on a reticle are transferred onto a plurality of partial areas on a wafer, respectively, and latent images formed on the partial areas are detected so as to obtain positional deviations which are then added to arrangement coordinates (F
Xn
, F
Yn
) in order to position the wafer. However, the former method offers such a problem that it is difficult to drive the rotational error into a value below a predetermined allowable value due to an error in depiction of the marks on the reticle. Further, the latter method offers such a problem that exposure operation for forming the latent images greatly lowers the through-put.
Further, another disadvantage occurs such that the pattern image of the reticle cannot precisely be aligned with the chip pattern on the wafer over their entire surfaces due to an error in the projection magnification of the projection system. Accordingly, as proposed, for example, in U.S. Pat. No. 4,629,313, projected positions of a plurality of marks on a reticle exclusive for measurement are detected in order to obtain a projection magnification of a projection optical system. However, there is preset a problem in which this method has to use the reticle exclusive for measurement so that a relatively long time is required for the measurement of the magnification, causing the through-put to be greatly lowered, and further, it is difficult to precisely measure the projection magnification due -to an error in the depiction of the reticle.
When the circuit patterns of the second and subsequent layers are projection-exposed on the wafers by the use of a projection exposure apparatus such as a stepper, as stated above, it is required to perform alignment of each shot area in which the circuit pattern has already formed on the wafer with a pattern image of the reticle serving as a mask to be exposed, namely alignment between the wafer and the reticle, with high accuracy. An alignment apparatus for executing such alignment is mainly comprised of an alignment sensor for generating a photoelectric signal by detecting the position of an alignment mark (wafer mark) attached in each shot area on the wafer, a signal processing system for obtaining an amount of deviation of said wafer mark from its original position by processing said photoelectric signal., and a positioning mechanism for compensating the position of the wafer or the reticle based
Furukawa Osamu
Kawakubo Masaharu
Magome Nobutaka
Tateno Hiroki
Yasuda Masahiko
Hoff Marc S.
Miles & Stockbridge P.C.
Nikon Corporation
Tsai Carol S.
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