Alignment mark system for electron beam/optical mixed lithograph

Details Alignment mark system for electron beam/optical mixed lithograph Alignment mark system for electron beam/optical mixed lithograph

1988-03-28

1990-01-09

James, Andrew J.

357 55, H01L 2702

Patent

active

048931632

ABSTRACT:
A system for making alignment marks in a semiconductor for a wafer etched in alignment with and bordered by an isolation level oxide. A silicon wafer has a film stack of silicon dioxide and silicon nitride. A pattern of data and alignment marks are exposed on the films and the device is processed to define a pattern or alignment mark positions on the silicon substrated bordered by the isolation oxide. The wafer is then patterned with a resist covering the device region and leaving exposed the alignment mark positions. The wafer is then etched to create the alignment mark pattern in the wafer while the device region is protected by the resist. The resist may then be removed and device processing continued.

REFERENCES:
patent: 4338620 (1982-07-01), Kawabe
patent: 4468857 (1984-09-01), Christian et al.
patent: 4660068 (1987-04-01), Sakuma et al.
IBM Technical Disclosure Bulletin, Vol. 27, #1B, Peressini et al., pp. 686-688, June, 1984.

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