Alignment mark pattern for semiconductor process

Details Alignment mark pattern for semiconductor process Alignment mark pattern for semiconductor process

1997-02-11

1998-06-02

Crane, Sara W.

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

356401, H01L 23544

Patent

active

057604843

ABSTRACT:
An alignment mark for increasing the accuracy of an alignment includes a cross pattern, two horizontal line patterns having serrated shape. The cross pattern is typically formed over a scribe line for alignment in semiconductor process. The cross pattern includes a vertical line and a horizontal line. The vertical line is vertical to the scribe line while the horizontal line is parallel to the scribe line. The horizontal patterns which are parallel to the scribe line are respectively connected to one end of the vertical line. The horizontal patterns have serrated patterns which are used to change the shape of a noise signal. The high of the serrated shape pattern is about 3 micro meters while the width of the serrated shape pattern is about 3 micro meters.

REFERENCES:
patent: 4823012 (1989-04-01), Kosugi
patent: 5051807 (1991-09-01), Morozumi
patent: 5684333 (1997-11-01), Moriyama

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