Alignment mark and alignment method using the same for...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature

Reexamination Certificate

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C257S797000

Reexamination Certificate

active

06936521

ABSTRACT:
An alignment mark is made of at least two nonparallel trenches having two reducing-width-to-zero ends. The displacement bias error, produced by a process bias error, of the centerlines of the trenches is zero where the width of the two trenches is zero. Hence, the alignment target on a substrate can be reproduced.

REFERENCES:
patent: 6043134 (2000-03-01), Bishop
patent: 6172409 (2001-01-01), Zhou

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