Alignment key for a semiconductor device having a seal against i

Details Alignment key for a semiconductor device having a seal against i Alignment key for a semiconductor device having a seal against i

1993-05-19

1994-05-10

Larkins, William D.

Active solid-state devices (e.g., transistors, solid-state diode

Alignment marks

257773, 257774, 257758, H01L 23544

Patent

active

053110617

ABSTRACT:
An alignment key (10) in a semiconductor substrate (40) is fabricated to display high optical contrast, and to prevent the diffusion of ionic contaminants through the alignment key (10) and into underlying portions of the semiconductor substrate (40). The alignment key (10) defines an enclosed structure formed by first and second metal layers (14, 20) which are electrically coupled by a filled via (22). A dielectric layer (42) is disposed between the metal layers (14, 20). A passivation layer (16) overlies an edge portion of the upper metal layer (14), however, the central portion of the upper metal layer (14) is bare. Slots (11, 12) in the upper metal layer (14) expose a portion of the lower layer (20) through the dielectric material (42). A high contrast scan signal (24) is generated as a continuous-wave laser beam traverses across the upper metal layer (14) and the slots (11,12). The scan signal is analyzed by a computer algorithm to determine the vertical and horizontal position of a semiconductor substrate (40) having multiple alignment keys (10) of the invention.

REFERENCES:
patent: 3366159 (1968-01-01), Pritchard, Jr. et al.
patent: 4755750 (1988-07-01), Leuschner
patent: 4893163 (1990-01-01), Rudeck
patent: 4962058 (1990-10-01), Cronin et al.
patent: 4970572 (1990-11-01), Kato et al.

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