Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2006-08-07
2009-02-03
Andújar, Leonardo (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C257S797000, C257SE23179, C438S401000, C438S462000
Reexamination Certificate
active
07485975
ABSTRACT:
The object of the present invention is providing an alignment error measuring mark for an accurate alignment in a metal photolithography process.A substrate reference mark110is produced by forming a concavity by an erosion caused from a chemical mechanical polishing a tungsten on a surface of a interlayer film132after holes for substrate reference mark111is formed on the interlayer film132at a predetermined density and the tungsten is deposited in the holes for substrate reference mark111and on the interlayer film132. A resist reference mark is formed on a resist film134on the substrate reference mark110and in a shape of a rectangular shape having a different size from the one of the substrate reference mark110. Since the substrate reference mark110is formed by the concavity from the erosion, a position of an edge133aof the concavity of a alminum film133can be aligned to a position of an edge110aof the concavity of the substrate reference mark110. Consequently, an alignment error can be accurately detected by measuring the position of the edge133aand a position of a resist reference mark120.
REFERENCES:
patent: 6143622 (2000-11-01), Yamamoto et al.
patent: 09-074063 (1997-03-01), None
patent: 2004-134473 (2004-04-01), None
patent: 2004-134474 (2004-04-01), None
Andújar Leonardo
Oki Electric Industry Co. Ltd.
Rabin & Berdo PC
Wright Tucker
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