Alignment-enhancing feed-through conductors for stackable silico

Details Alignment-enhancing feed-through conductors for stackable silico Alignment-enhancing feed-through conductors for stackable silico

1981-03-18

1983-07-19

Kucia, R. R.

Electricity: electrical systems and devices

Miscellaneous

174 685, 361395, 361412, H05K 114

Patent

active

043947123

ABSTRACT:
Alignment-enhancing electrically conductive feed-through paths are provided for the high-speed low-loss transfer of electrical signals between integrated circuits of a plurality of silicon-on-sapphire bodies arrayed in a stack. The alignment-enhancing feed-throughs are made by a process involving the drilling of holes through the body, double-sided sputtering, electroplating, and the filling of the holes with solder by capillary action. The alignment-enhancing feed-throughs are activated by forming a stack of wafers and remelting the solder whereupon the wafers, and the feed-through paths, are pulled into alignment by surface tension forces.

REFERENCES:
patent: 3148310 (1964-09-01), Feldman
patent: 3811186 (1974-05-01), Larnerd
patent: 3835531 (1974-09-01), Luttmer
patent: 3904934 (1975-09-01), Martin
patent: 4067104 (1978-01-01), Tracy
patent: 4074342 (1978-02-01), Honn et al.
McIntosh et al., Packaging of Integrated Circuits, IBM Tech. Disc. Bull., vol. 15, #6, 1972, pp. 1977 to 1080.

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