Alignment chips positioned in the peripheral part of the semicon

Details Alignment chips positioned in the peripheral part of the semicon Alignment chips positioned in the peripheral part of the semicon

1997-04-14

1999-08-17

Talbot, Brian K.

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

427 99, 427124, 427282, 427250, 427255, 438462, 438975, B05D 512, H07L 21301

Patent

active

059391324

ABSTRACT:
On a semiconductor substrate, chips to be products and alignment chips located at a portion a part thereof is left out from a peripheral part of the semiconductor substrate are formed. Contact holes and alignment marks are formed at the chips to be products and the alignment chips. Covering the alignment chips with alignment mark cover parts of a substrate holder, a material for metal wiring is deposited on the semiconductor substrate to form a metal film on the substrate. A mask pattern is formed on the metal film using the alignment marks of the alignment chips on which the metal film is not formed.

REFERENCES:
patent: 4125418 (1978-11-01), Vinton
patent: 4468857 (1984-09-01), Christian et al.
patent: 4599970 (1986-07-01), Peterson
patent: 4661228 (1987-04-01), Mintz
patent: 4919076 (1990-04-01), Lutz
patent: 4963423 (1990-10-01), Sekiguchi
patent: 5277749 (1994-01-01), Griffith et al.
patent: 5362681 (1994-11-01), Roberts, Jr. et al.

Affiliated with

Also associated with

Rating

Alignment chips positioned in the peripheral part of the semicon does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Alignment chips positioned in the peripheral part of the semicon, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Alignment chips positioned in the peripheral part of the semicon will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-313341