Alignment check method on printed circuit board

Semiconductor device manufacturing: process – With measuring or testing

Reexamination Certificate

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Reexamination Certificate

active

06458608

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a checking alignment method for a printed circuit board, and more particularly relates to a checking alignment method for a printed circuit board in a liquid crystal display manufacture.
2. Description of the Prior Art
Liquid crystal display (LCD) is commonly referred to as electric equipment in the past twenty years. With current technology, the display function of the LCD has apparently advanced, especially in film tape, low weight, and low power consumption. Recently, the aim of development in LCD's is the pursuit of a big display size and high pixel resolution.
Conventionally, the LCD substrate and drive Integrated circuits are attached by using chip on board (COB) technology, which uses an epoxy to adhere and seal chips on the printed circuit board, thus using a flexible printed circuit (FPC) to attach the LCD substrate and the printed circuit board. Recently, the most common fabricating process to attach the LCD substrate and drive Integrated circuits uses taped automated bonding (TAB) technology, which uses tape to adhere chips thereon, and then the LCD substrate and the printed circuit board are connected to complete the module. This method can save the cost of pre-packaging the IC chips. However, no matter the method that's chosen, testing the module after attaching the LCD substrate and the PCB is important. If the LCD can not function, it is a must to find out where is the problem lies. Hence, it is an important aim to check the alignment.
Conventional checking alignment technology has two methods when the module is using a TAB process. The first method comprises two steps. First step is using an outer lead bonding tester to check the alignment of the attachment of the LCD substrate and tapes. Second step is performing a product test to check the alignment of the attachment of the PCB and tapes. However, with the integrating density and pixels continually advanced, the space of metal leads is shrunk, so the outer lead bonding tester can not apply in such small space. The second method is only to perform a product test after attaching the LCD substrate and the PCB by using the TAB process.
The first method will cause the difficult of the judge because the space of metal leads is too small and there is still need a test after attaching tapes and the PCB. The second method can not judge the fault that comes from the attachment between the LCD substrate and those tapes or between the PCB and those tapes, and can not judge if the fault comes from the abating function of the PCB. If the problem is from the attachment between the LCD substrate and tapes or between the PCB and tapes, it must need operators find out the wrong position by using a magnifying glass. Moreover, conventional method can not find out the direct wrong position because the signal of previous tapes will effect the signal of following tapes.
Both conventional methods need operators to check the alignment with a magnifying glass or focusing equipment, this process is very difficult in return costs time and money. It is important to find a simple and quick method for checking the alignment that does not effect the process.
Referring to
FIG. 1
, the figure is shown that a liquid crystal display substrate
100
and a printed circuit board (PCB)
130
are attached by using a tape automated bonding process with a plurality of tapes
120
. The liquid crystal display substrate
100
comprises following elements. First, a glass substrate having a plurality of outer lead bonding is provided for displaying image and circuits. Then, a spacer is provided to control the space for filling the liquid crystal material. Next, a liquid crystal material and a polarizer are provided to display image and to control the direction of the light. Then, an alignment layer and a color filter are provided to control the array direction of the liquid crystal material and to make the liquid crystal display colorful. Each of those tapes
120
are aligned and connected the LCD substrate
100
and the PCB
130
.
Some disadvantages were found in using conventional checking alignment method. One disadvantage of the conventional method is it cannot find which tape is aligned wrong and needs an operator to find the wrong position by using a magnifying glass. This way costs a lot of time and money. Another disadvantage is that the conventional method can not find the wrong position because the signal of previous tapes will effect the signal of following tapes, furthermore it can not judge the fault if the function of the PCB is abating, but the alignment is right.
SUMMARY OF THE INVENTION
An object of the invention is to provide a simple method for checking alignment and finding wrong alignment positions.
Another object of the invention is to connect original dummy lines on the module elements for checking alignment.
Another object of the invention is to judge more than two wrong alignment positions and to quickly find the wrong alignment positions.
A further object of the invention is to use visible processes and equipment and that can simplify-y current checking alignment method to reduce the time and the cost.
In order to achieve previous objects of the invention, a checking alignment method for a printed circuit board is provided and comprises following steps. First, a substrate having a plurality of substrate dummy lines on a surface is provided, wherein those substrate dummy lines are singly connected to a connecting boundary of the substrate. Then, a printed circuit board (PCB) having a plurality of PCB dummy lines on a surface is provided. Wherein PCB dummy lines are singly connected to a connecting boundary of the PCB, which is obverse to the connecting boundary of the substrate, and wherein each of those PCB dummy lines is distinguishingly obverse to each of those substrate dummy lines. Next, a tape automated bonding process is performed to attach the substrate and the PCB with a plurality of tapes, wherein each of those tapes has a plurality of tape dummy lines and those tape dummy lines are singly connected to two connecting boundaries of those tapes. Each of those tape dummy lines is aligned and connected with each of those substrate dummy lines and each of those PCB dummy lines. Following, those substrate dummy lines and those PCB dummy lines are connected to make a circuit on the substrate, those tapes, and the PCB. Last, a circuit testing process is performed to the circuit.
Furthermore, in order to achieve previous objects of the invention, an apparatus for checking alignment in a printed circuit board is provided and comprises following elements. First, a substrate is provided, wherein the substrate has a plurality of substrate dummy lines on a surface, and the substrate dummy lines are singly connected to a connecting boundary of the substrate. Second, a printed circuit board (PCB) is provided, wherein the PCB has a plurality of PCB dummy lines on a surface. The PCB dummy lines are singly connected to a connecting boundary of the PCB and the connecting boundary of the PCB is obverse to the connecting boundary of the substrate. Each of the PCB dummy lines is distinguishingly obverse to each of the substrate dummy lines. Third, a plurality of tapes is provided. Those tapes are used to attach the substrate and the PCB. Each of those tapes has a plurality of tape dummy lines. Those tape dummy lines are singly connected to two connecting boundaries of those tapes. Each of those tape dummy lines is aligned and connected with each of those substrate dummy lines and each of those PCB dummy lines. Those substrate dummy lines and those PCB dummy lines are connected to make a circuit on the substrate, the tapes, and the PCB, and then a circuit testing process is performed to the circuit.


REFERENCES:
patent: 4896946 (1990-01-01), Suzuki et al.
patent: 5709576 (1998-01-01), Lippmann et al.
patent: 6118081 (2000-09-01), Faragi et al.
patent: 6162064 (2000-12-01), Faragi et al.

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