Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2005-09-27
2005-09-27
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C257S667000, C257S773000, C257S774000, C257S775000, C257S776000, C257S920000, C174S262000, C438S401000, C438S462000, C438S620000, C438S033000
Reexamination Certificate
active
06949839
ABSTRACT:
A method of aligning a plurality of empty-spaced buried patterns formed in semiconductor monocrystalline substrates is disclosed. In an exemplary embodiment, high-temperature metal marks are formed to include a conductive material having a melting temperature higher than an annealing temperature used to form such empty-spaced buried patterns. The high-temperature metal marks are formed prior to the formation of the empty-spaced buried patterns formed in a monocrystalline substrate, so that the empty-space buried patterns are aligned to the marks. Subsequent semiconductor structures that are formed as part of desired semiconductor devices can be also aligned to the marks.
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Farrar Paul A.
Geusic Joseph E.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Micro)n Technology, Inc.
Williams Alexander Oscar
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