Algorithmic analog-to-digital converter having redundancy and di

Details Algorithmic analog-to-digital converter having redundancy and di Algorithmic analog-to-digital converter having redundancy and di

1995-01-17

1997-07-01

Williams, Howard L.

Coded data generation or conversion

Converter calibration or testing

341162, H03M 110

Patent

active

056443080

ABSTRACT:
An algorithmic converter system includes an algorithmic converter having a loop gain substantially less than two for converting an analog input signal to a redundant digital code; and a digital computation unit for converting the redundant digital code to a digital output signal by computing a polynomial of a radix, said radix being substantially equal to the loop gain, wherein the redundant digital code specifies coefficients of the polynomial. The redundancy extends the analog input conversion range with respect to the voltage reference of the algorithmic converter. Moreover, if the algorithmic converter has a maximum offset of V.sub.offmax, a reference voltage of V.sub.ref, and a loop gain less than 2/(1+V.sub.offmax /V.sub.ref), then loop offset will not cause differential nonlinearities. Nonlinearity is further reduced by digitally compensating for variations in the loop gain. The method includes measuring the loop gain of said algorithmic converter, and setting the radix of the computation unit equal to the measured value of the loop gain. Preferably the loop gain is measured by converting two reference voltages to obtain two sets of digits from the algorithmic converter, and employing a successive approximation technique that alternately computes an offset value and adjusts the radix. For the redundant signed digit (RSD) algorithmic converter, rapid convergence is obtained using a zero reference voltage and a non-zero reference voltage. For a conventional restoring (CR) algorithmic converter, however, positive and negative reference voltages are used.

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