Alerting system with dual-address memory

Details Alerting system with dual-address memory Alerting system with dual-address memory

1976-05-28

1979-03-20

Caldwell, Sr., John W.

Communications: electrical

Systems

Nonselective paging

325 64, 325466, 340164R, 340171A, H04M 1102

Patent

active

041456840

ABSTRACT:
A dual address paging receiver is described having page memory for automatically storing a page in the mode addressed if the user does not reset the receiver within a prescribed time interval after an alert signal is started. After a page is stored it can be recalled in the mode addressed from page memory by operating the reset button. The receiver provides two different kinds of alert signals depending upon the mode in which it is addressed. The alert generator is also operable in two different modes that are audibly distinguishable from each other for alternately indicating either power turn-on of the device or the receipt of a calling signal.

REFERENCES:
patent: 2968802 (1961-01-01), Flory et al.
patent: 3513399 (1970-05-01), Wycoff
patent: 3694579 (1972-09-01), McMurray
patent: 3742481 (1973-06-01), Nickerson
patent: 3889252 (1975-06-01), Cox et al.
patent: 4010460 (1977-03-01), De Rosa
patent: 4010461 (1977-03-01), Stodolski

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