Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric
Reexamination Certificate
2006-02-07
2006-02-07
Parekh, Nitin (Department: 2811)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having air-gap dielectric
C438S619000, C438S629000, C438S618000, C438S637000, C438S627000, C438S634000, C257S522000, C257S758000, C257S774000
Reexamination Certificate
active
06995073
ABSTRACT:
Method and structure for integrating conductive and dielectric materials in a microelectronic structure having air gaps are disclosed. Certain embodiments of the invention comprise isolating dielectric layers from conductive layers using an etch stop layer to facilitate controlled removal of portions of the dielectric layers and formation of air gaps or voids. Capping and peripheral structural layers may be incorporated to increase the structural integrity of the integration subsequent to removal of sacrificial material.
REFERENCES:
patent: 6413852 (2002-07-01), Grill et al.
patent: 6689680 (2004-02-01), Greer
patent: 6696222 (2004-02-01), Hsue et al.
patent: 6713835 (2004-03-01), Horak et al.
patent: 2003/0127740 (2003-07-01), Hsu et al.
Parekh Nitin
Plimier Michael D.
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