Multiplex communications – Pathfinding or routing – Through a circuit switch
Reexamination Certificate
2007-09-25
2007-09-25
Hsu, Alpus H. (Department: 2616)
Multiplex communications
Pathfinding or routing
Through a circuit switch
C370S395400, C370S408000, C370S412000, C370S429000, C710S317000
Reexamination Certificate
active
10302436
ABSTRACT:
A content addressable merged queue (camQ) architecture for high-speed switch fabrics reduces the memory requirement for crossbar switch input and output queues using memory cells and age tag comparators. CamQ emulates VOQ FIFO for each supporting priority, eliminating HOL blocking. Multiple QoS levels are supported cost effectively at higher traffic bandwidth limits. Content addressable memory (CAM) cells store payload destinations, which can be addressed by cell priorities. Once a priority for QoS is decided, all the cells with the selected priority in the payload can make connection requests to destination ports directly through the CAM structure. An age tag is assigned to incoming cells and fast age tag comparators provide FCFS features by selecting the oldest cell. Small memory sizes prevent the bottlenecking in ingress and egress queues. A CIOQ crossbar has a fast switching speed, emulating a FIFO output queue switch. Age and priority are interleaved to schedule switching.
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Cho Jung Wook
Pak Edward
Park Sung Man
Park Sung Soo
Blakely & Sokoloff, Taylor & Zafman
Hsu Alpus H.
Silicon Image Inc.
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