AGC circuit with non-linear gain for use in PLL circuit

Pulse or digital communications – Spread spectrum – Direct sequence

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Details

331 1A, 318799, 318814, H04L 2708, H03D 324

Patent

active

053295609

ABSTRACT:
A circuit and method for generating drive signals having a frequency synchronized to a reference frequency signal is disclosed. The circuit includes a PLL that includes a motor, and a circuit for generating a signal having a frequency proportional to the speed of the motor. A phase detector produces a signal for a time proportional to a phase difference between the motor speed signal and a reference frequency signal. A first phase difference measuring circuit produces a first voltage output signal at a first gain proportional to the phase difference when the duration of the phase detector signal is less than a predetermined time. A second phase difference measuring circuit produces a second output signal at a second gain when the duration of the phase detector signal is greater than the predetermined time. The first and second output signals are summed and applied to control the speed of the motor.

REFERENCES:
patent: 4816722 (1989-03-01), Shigemori
patent: 5086261 (1992-02-01), Sakata et al.

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