AFT Arrangement for a phase locked loop tuning system

Details AFT Arrangement for a phase locked loop tuning system AFT Arrangement for a phase locked loop tuning system

1979-07-30

1981-01-13

Ng, Jin F.

Telecommunications

Receiver or analog modulated signal frequency converter

Signal selection based on frequency

455183, 455192, H04B 126

Patent

active

042453518

ABSTRACT:
A phase locked loop tuning system includes a phase comparator for generating pulse error signals having pulses with durations corresponding to the magnitude of a phase and/or frequency deviation between a frequency reference signal and a frequency-divided signal derived from a local oscillator signal. A low pass filter is responsive to the pulse error signals for generating a tuning voltage for controlling a voltage controlled local oscillator to tune standard frequency RF carriers. So that a substantial portion of the tuning system may be incorporated in a single integrated circuit, a pulse converter is provided to convert an analog AFT signal to pulse error signals similar to those generated by the phase comparator but with durations representing the magnitude of a deviation between the frequency of the IF picture carrier and its nominal value. The AFT related pulse error signals are selectively applied to the low pass filter to accommodate the tuning of nonstandard frequency RF carriers. The tuning system may include a duty cycle control unit to control the duty cycle of the AFT related error pulses in accordance with the selected channel so that the sensitivity of the tuning system is more uniform throughout the tuning range.

REFERENCES:
patent: 3821650 (1974-06-01), Kase et al.
patent: 3980968 (1976-09-01), Ma
patent: 4031549 (1977-06-01), Rast et al.
patent: 4078212 (1978-03-01), Rast
patent: 4123716 (1978-10-01), Borg
patent: 4130804 (1978-12-01), Mogi et al.
"A Low Cost, High Performance Digital TV Tuning Systems" by Dreiske, 2/1977, IEEE Transactions on Consumer Electronics.
"An Electronic Design Practical Guide to A/D Conversion, Part 2" by Schmid et al., 12/68, in Electronic Design #26.

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