Patent
1997-05-27
1998-11-03
Sheikh, Ayaz R.
395741, G06F 946
Patent
active
058322795
ABSTRACT:
A high speed Advanced Programmable Interrupt Controller (APIC) system includes a plurality of local units for prioritizing and passing interrupts, an Input/Output (I/O) unit for feeding interrupts to the local units, and a serial link data transmission system for interconnecting the I/O unit and the local units. The I/O unit and each local unit have a parallel I/O interface. The serial link transmission system includes a parallel signal bus connected to the parallel I/O interface of the I/O unit; a plurality of first serial link transceivers having parallel I/O interfaces connected to the parallel signal bus, and serial I/O interfaces respectively; a plurality of second serial link transceivers having parallel I/O interfaces connected to the parallel I/O interfaces of the local units, and serial I/O interfaces respectively; and a plurality of serial transmission lines interconnecting the serial I/O interfaces of first serial link transceivers and the serial I/O interfaces of second serial link transceivers respectively.
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* LSI Logic, SeriaLink.TM. SL300 High-Speed Serializer/Deserializer Technical Manual, May 1995.
Chow Jerry
Egan Richard
Rostoker Michael D.
Verman Sushant
LSI Logic Corporation
Pancholi Jigar
Sheikh Ayaz R.
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