Advanced processor with mechanism for enforcing ordering...

Details Advanced processor with mechanism for enforcing ordering... Advanced processor with mechanism for enforcing ordering...

2011-06-14

2011-06-14

Patel, Jayanti K (Department: 2465)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S392000, C370S394000

Reexamination Certificate

active

07961723

ABSTRACT:
An advanced processor comprises a plurality of multithreaded processor cores each having a data cache and instruction cache. A data switch interconnect is coupled to each of the processor cores and configured to pass information among the processor cores. A messaging network is coupled to each of the processor cores and a plurality of communication ports. In one aspect of an embodiment of the invention, the data switch interconnect is coupled to each of the processor cores by its respective data cache, and the messaging network is coupled to each of the processor cores by its respective message station. Advantages of the invention include the ability to provide high bandwidth communications between computer systems and memory in an efficient and cost-effective manner.

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