Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Reexamination Certificate
1998-09-30
2001-01-16
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
C257S510000, C257S513000
Reexamination Certificate
active
06175144
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Description
This invention generally relates to semiconductor processing, and, more particularly, to the isolation of transistors formed on a substrate.
2. Description of the Related Art
The implementation of electrical circuits requires connecting isolated devices through very specific electrical paths. As it relates to the fabrication of various integrated circuits on, for example, a silicon substrate, this means that the various devices formed in the silicon must be electrically isolated from one another. Such devices, when properly isolated, may thereafter be interconnected to create specific electrical circuits.
The ability to effectively isolate electrical devices, such as transistors, from one another is very important in the fabrication of integrated circuits. For example, effective isolation of electrical field effect transistors is highly desirable to prevent the establishment of unwanted parasitic channels between adjacent devices. Yet another example is the requirement for effective isolation of the collector regions of bipolar integrated circuits.
Generally speaking, the deeper an isolation structure extends into the surface of the substrate, the better the performance of the isolation structure. However, problems have been encountered as the depth of single width trenches has been increased. For example, with deep, single width trenches, problems have arisen at the intersection of the trench with the surface of the substrate. The problems have included, but are not limited to, lack of adhesion of process layers on the surface of the substrate, cracks in the substrate and/or the process layers, and delamination of process layers, etc.
The present invention is directed to a method and device that solves some or all of the aforementioned problems.
SUMMARY OF THE INVENTION
The present invention is directed to a semiconductor device having an improved structure for isolating transistors formed on a semiconductor substrate, and a method for making same. The device is comprised of a semiconductor device having a first recess formed in the substrate of the device. The first recess has a first width and extends a first depth beneath the surface of the substrate. The device further comprises a second recess formed in the substrate of the device. The second recess has a second width and extends a second depth beneath the surface of the substrate. The second depth of the second recess is greater than the first depth of the first recess, and the first width of the first recess is greater than the second width of the second recess. The device further comprises an isolation structure positioned in at least a portion of the first and second recesses.
The inventive method disclosed herein comprises forming a first recess in the substrate of the device, said first recess having a first depth and a first width, and forming a second recess in the substrate of the device, the second recess having a second depth and a second width. The first width of the first recess is formed such that it is greater than the second width of the second recess, and the second depth of the second recess is formed such that it is greater than the first depth of the first recess. The method further includes formation of an isolation structure in the first and second recesses.
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Gardner Mark I.
Gilmer Mark C.
Advanced Micro Devices , Inc.
Crane Sara
Williams Morgan & Amerson
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