Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2007-04-17
2007-04-17
Nguyen, Linh My (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C327S149000
Reexamination Certificate
active
10980676
ABSTRACT:
A method and apparatus is disclosed for adjusting at least one of a supply voltage and a clocking frequency applied to digital circuitry of a computing device, wherein the digital circuitry comprises a plurality of critical path circuits and a corresponding plurality of propagation delay error circuits. Each propagation delay error circuit generates a propagation delay error signal representing an error in propagation delay for the corresponding critical path circuit. The computing device further comprises a voting circuit for comparing the propagation delay error signals in order to select the largest propagation delay error signal for use in adjusting the at least one of the supply voltage and clocking frequency.
REFERENCES:
patent: 4675617 (1987-06-01), Martin
patent: 4737670 (1988-04-01), Chan
patent: 4822144 (1989-04-01), Vriens
patent: 4922141 (1990-05-01), Lofgren et al.
patent: 5146121 (1992-09-01), Searles et al.
patent: 5440250 (1995-08-01), Albert
patent: 5440520 (1995-08-01), Schutz et al.
patent: 5638019 (1997-06-01), Frankeny
patent: 5777567 (1998-07-01), Murata et al.
patent: 5787292 (1998-07-01), Ottesen et al.
patent: 6055287 (2000-04-01), McEwan
patent: 6125157 (2000-09-01), Donnelly et al.
patent: 6157247 (2000-12-01), Abdesselem et al.
patent: 6259293 (2001-07-01), Hayase et al.
patent: 6333652 (2001-12-01), Iida et al.
patent: 6356062 (2002-03-01), Elmhurst et al.
patent: 6424184 (2002-07-01), Yamamoto et al.
patent: 6425086 (2002-07-01), Clark et al.
patent: 6449575 (2002-09-01), Bausch et al.
patent: 6525585 (2003-02-01), Iida et al.
patent: 6535735 (2003-03-01), Underbrink et al.
patent: 6577535 (2003-06-01), Pasternak
patent: 6617936 (2003-09-01), Dally et al.
patent: 6622252 (2003-09-01), Klaassen et al.
patent: 6657467 (2003-12-01), Seki et al.
patent: 6693473 (2004-02-01), Alexander et al.
patent: 6831494 (2004-12-01), Fu et al.
patent: 6868503 (2005-03-01), Maksimovic et al.
patent: 6870410 (2005-03-01), Doyle et al.
patent: 6885210 (2005-04-01), Suzuki
patent: 2003/0093160 (2003-05-01), Maksimovic et al.
patent: 2005/0134391 (2005-06-01), Kimura et al.
patent: 2005/0218871 (2005-10-01), Kang et al.
patent: WO 90/13079 (1990-11-01), None
Marc Fleischmann, “LongRun Power Management, Dynamic Power Management for Crusoe Processors”, Transmeta Corporation, pp. 1-18, Jan. 17, 2001.
Alexander Klaiber, “The Technology Behind Crusoe Processors, Low-Power X86-Compatible Processors Implemented With Code Morphing Software”, Transmeta Corporation, pp. 1-18, Jan. 2000.
Burd, et al., “A Dynamic Voltage Scaled Microprocessor System”, IEEE Journal of Solid-State Circuits, vol. 35, No. 11, pp. 1571-1580, Nov. 2000.
Wei, et al., “A Fully Digital, Energy-Efficient, Adaptive Power-Supply Regulator”, IEEE Journal of Solid-State Circuits, vol. 34, No. 4, pp. 520-528, Apr. 1999.
A. J. Stratakos, “High-Efficiency Low-Voltage DC-DC Conversion for Portable Applications”, Ph.D. Dissertation, University of California, Berkeley, pp. 1, 124-129, 177-183, 188-191, Dec. 1998.
Sheerin, Esq. Howard H.
Western Digital Technologies Inc.
LandOfFree
Adjusting power consumption of digital circuitry relative to... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Adjusting power consumption of digital circuitry relative to..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Adjusting power consumption of digital circuitry relative to... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3728722