Television – Synchronization – Automatic phase or frequency control
Patent
1993-03-29
1997-04-08
Harvey, David E.
Television
Synchronization
Automatic phase or frequency control
H04N 504
Patent
active
056192762
ABSTRACT:
Adjustment and maintenance of a phase relationship between a video signal and a scan synchronizing signal to assure proper horizontal centering is provided in a horizontal deflection system. A first phase locked loop generates a first timing signal at a first frequency, synchronously with a horizontal synchronizing component in a video signal. A presettable counting circuit operates synchronously with the first timing signal for dividing a clock signal to generate a second timing signal at a second frequency. A second phase locked loop generates a scan synchronizing signal from the second timing signal. A microprocessor may supply different numbers to a register, the output of the register being coupled to the presettable counting circuit. Different numbers change the relative phase between the first and second timing signals by incremental steps. The microprocessor monitors a video source selection switch to gate one of alternative video sources as a video and synchronizing signal output and adjusts the relative phase between the horizontal synchronizing component of the selected video source and a synchronous timing signal by a factor appropriate for the selected video source. A manually operable circuit may be coupled in a feedback path of the second phase locked loop for adjusting the relative phase between the second timing signal and the scan synchronizing signal, over a range corresponding to an incremental step.
REFERENCES:
patent: 3891800 (1975-06-01), Janssen et al.
patent: 4317133 (1982-02-01), Fernsler et al.
patent: 4425581 (1984-01-01), Schweppe et al.
patent: 4591910 (1986-05-01), Lai et al.
patent: 4611229 (1986-09-01), Srivastava et al.
patent: 4611230 (1986-09-01), Nienaber
patent: 4686567 (1987-08-01), Burdick
patent: 4730216 (1988-03-01), Casey et al.
patent: 4739403 (1988-04-01), Mark
patent: 4769705 (1988-09-01), Lendaro
patent: 4991023 (1991-02-01), Nicals
patent: 4996596 (1991-02-01), Hirao et al.
patent: 5019907 (1991-05-01), Murakoshi et al.
Multi Scanning TV Processor IC, Berland, et al., IEEE 1989 International Conference on Consumer Electronics, Digest of Technical Papers, Jun. 6-9, 1989 (CH2724-3/89/0000-0312), pp. 312-323.
Multi Scanning TV Processor IC, Berland et al., IEEE Transactions on Consumer Electronics, vol. 35, No. 3, Aug. 1989 (0098 3063/89/0200 0315), pp. 315-318.
DPU 2532 Deflection Processor Unit-Part of ITT "Digital Chip Set" pp. 47-72 of larger publication, title and date unknown, but believed to predate reference AS cited below.
DPU 2553, DPU 2554, DPU 2555 Deflection Processors, pp. 23-24 ITT Semiconductors, Lawrence MA, Edition 1987/89, Order No. 6251-302-1/E.
Copy of commonly owned, concurrently filed U. S. Application Serial No. 499,249.
Search Report from counterpart application in Turkey, dated Apr. 26, 1993.
Christopher Todd J.
Keen Ronald T.
Fried Harvey D.
Harvey David E.
Laks Joseph J.
Thomson Consumer Electronics Inc.
LandOfFree
Adjustable video/raster phasing for horizontal deflection system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Adjustable video/raster phasing for horizontal deflection system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Adjustable video/raster phasing for horizontal deflection system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2400479