Adjustable verify and program voltages in programmable devices

Details Adjustable verify and program voltages in programmable devices Adjustable verify and program voltages in programmable devices

1997-08-08

2000-10-10

Wong, Don

Static information storage and retrieval

Floating gate

Particular biasing

36518518, 365201, G11C 2900

Patent

active

061308420

ABSTRACT:
A voltage source is configured to produce a desired voltage and the desired voltage is applied to a programmable cell coupled to the voltage source. Configuration may be accomplished by loading a register with a programmed voltage value which may be received as a serial data stream through a test access port coupled to the register. For one embodiment, the voltage source may be coupled to a gate of the programmable cell, thus allowing testing of margin voltages of the programmable cell. In a further embodiment, the voltage source may be coupled to a drain of the programmable cell through a load line circuit, thus providing a programmed voltage for the programmable cell. In general then, the programmable voltage source is configurable to provide a voltage to the programmable cell in accordance with a programmed voltage value loaded into the programmable voltage source. The present invention may be embodied in a programmable device such as a PLD a CPLD or an FPGA and provides easily adjustable verify and/or program voltages, configurable through use of the programmable register, to test the operation of the programmable cell. The higher the bit count of the register, the more precise a verify and/or program voltage that may be provided.

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Advanced Information Data Sheet Ultra39512 UltraLogic.TM. 512-Marcocell CPLD, Document # 38-00470, Fax ID: 6134 (1995).
Advanced Information Data Sheet Ultra39384 Ultra Logic.TM. 384-Marcocell CPLD, Document # 38-00472, Fax ID: 6143 (1995).
Advanced Information Data Sheet Ultra39256 UltraLogic.TM. 256-Marcocell CPLD, Document # 38-00474, Fax ID: 6133 (1995).
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Advanced Information Data Sheet Ultra39000 UltraLogic.TM. High-Density CPLD Family, Document # 38-00475, Fax ID: 6141 pp. 1-2 (1995).
Test Technology Standards Committee of the IEEE Computer Society, "IEEE Standard Test Access Port and Boundary-Scan Architecture", pp.i-xvii, 1-1--12-6 & A-1-A-12 (1993).

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