Adjustable time delay circuit

Details Adjustable time delay circuit Adjustable time delay circuit

1983-12-09

1986-10-21

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

328 55, H03K 513

Patent

active

046187871

ABSTRACT:
An adjustable time delay circuit 10, 50 includes a time delay line 12 including a plurality of series connected time delay units 18a-p. During adjustment, sampled signals along the delay line 12 are compared with a reference signal by NOR-gates 22e-m. Upon a comparison being attained, the output of the corresponding NOR-gate 22e-m sets a selected flip-flop 30e-m which in turn routes the signal at a selected delay line tap 38e-m through a NOR-gate 34e-m to an output OR-gate 40. The tap 38e-m selected, compensates for component propagation characteristics thus maintaining a predetermined time delay through the time delay circuit 10.

REFERENCES:
patent: 3378703 (1968-04-01), Huxster et al.
patent: 3502991 (1970-03-01), Sampson
patent: 3817582 (1984-06-01), Green et al.
patent: 3911368 (1975-10-01), Tarczy-Hornoch

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