Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having air-gap dielectric
Reexamination Certificate
2008-04-15
2008-04-15
Tran, Thien F (Department: 2811)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having air-gap dielectric
C438S422000, C438S618000, C438S619000
Reexamination Certificate
active
11418921
ABSTRACT:
An adjustable self aligned low capacitance integrated circuit air gap structure comprises a first interconnect adjacent a second interconnect on an interconnect level, spacers formed along adjacent sides of the first and second interconnects, and an air gap formed between the first and second interconnects. The air gap extends above an upper surface of at least one of the first and second interconnects and below a lower surface of at least one of the first and second interconnects, and the distance between the spacers defines the width of the air gap. The air gap is self-aligned to the adjacent sides of the first and second interconnects.
REFERENCES:
patent: 5117276 (1992-05-01), Thomas et al.
patent: 5324683 (1994-06-01), Fitch et al.
patent: 5444015 (1995-08-01), Aitken
patent: 5510645 (1996-04-01), Fitch et al.
patent: 5530290 (1996-06-01), Aitken
patent: 6150232 (2000-11-01), Chan et al.
patent: 6184121 (2001-02-01), Bushwalter
patent: 6200900 (2001-03-01), Kitch
patent: 6211057 (2001-04-01), Lin et al.
patent: 6281585 (2001-08-01), Bothra
patent: 6329279 (2001-12-01), Lee
patent: 6333255 (2001-12-01), Sekiguchi
patent: 6413852 (2002-07-01), Grill
patent: 6423629 (2002-07-01), Ahn et al.
patent: 6472266 (2002-10-01), Yu et al.
patent: 6545361 (2003-04-01), Ueda et al.
patent: 6812113 (2004-11-01), Alieu
patent: 6838354 (2005-01-01), Goldberg et al.
patent: 2001/0023123 (2001-09-01), Kim
patent: 2002/0127844 (2002-09-01), Grill et al.
patent: 2004/0097065 (2004-05-01), Lur et al.
patent: 2005/0079700 (2005-04-01), Schindler
V. Arnal, J. Torres, P. Gayet, R. Gonella, P. Spinelli, M. Guillermet, J-P. Reynard, GC. Verove;Integration of a 3 Level Cu-SiO2 Air Gap Interconnect for Sub 0.1 micron CMOS Technologies; IEEE, Jun. 2001, pp. 298-300.
Geffken Robert M.
Motsiff William T.
Canale Anthony
DeLio & Peterson LLC
Peterson Peter W.
Tran Thien F
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