Adjustable delay line

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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Details

327276, 327284, H03H 1126

Patent

active

056315937

ABSTRACT:
A plurality of binary signals each having first and second logic levels respectively representing a binary "1" and a binary "0" and each indicating a binary digit of an individual binary significance cumulatively represent an adjustable delay to be provided by a plurality of delay elements. A first particular number of the binary signals of greatest binary significance are decoded to provide, in a thermometer code, a plurality of signals each having first and second amplitudes. The signals in the thermometer code control the operation of individual switches each having first and second operative relationships to provide respectively for a maximum delay or a minimum delay in an associated one of the delay elements. The binary signals of least binary significance are decoded to produce an analog signal variable between the first and second amplitudes. The analog signal is introduced, in a third operative relationship of an individual one of the switches, to the delay element associated with such switch to provide a delay variable between the minimum and maximum values in accordance with the amplitude of the analog signal. The selection of the individual one of the switches is dependent upon the pattern of the binary signals in the thermometer code, this pattern being a binary 10 in a successive pair of the decoded binary signals. The delay elements may be connected in series to provide a cumulative delay constituting the sum of the delays in the different delay elements and corresponding to the delay indicated by the binary signals.

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patent: 5111975 (1992-05-01), Hillis et al.
patent: 5144174 (1992-09-01), Murakami
patent: 5192886 (1993-03-01), Wetlaufer
patent: 5210450 (1993-05-01), Parkinson

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