Adjustable delay circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform

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Details

327287, 327283, H03K 5159, H03K 5153

Patent

active

061247464

ABSTRACT:
An adjustable delay circuit, for a logic input signal, comprises circuitry for charging a capacitance at a first constant current when the logic signal switches to a first logic state; circuitry for discharging the capacitance at a second constant current when the logic signal switches to the second logic state; circuitry for stopping charging and discharging of the capacitance between the moment when the voltage across the capacitance reaches a high threshold or a low threshold and a subsequent switching of the logic signal; and a first comparator connected to switch the state of an output signal when the voltage across the capacitance crosses a third threshold included between the first and second thresholds.

REFERENCES:
patent: 4620312 (1986-10-01), Yamashita
patent: 4812687 (1989-03-01), Larson et al.
patent: 4893036 (1990-01-01), Hester et al.
patent: 5025176 (1991-06-01), Takeno
patent: 5066877 (1991-11-01), Hamano et al.
patent: 5461335 (1995-10-01), Tsuchiva
patent: 5594377 (1997-01-01), Choi et al.

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