Adjustable AC load structure

Details Adjustable AC load structure Adjustable AC load structure

1999-10-25

2001-11-13

Mottola, Steven J. (Department: 2817)

Amplifiers

With semiconductor amplifying device

Including differential amplifier

C327S359000

Reexamination Certificate

active

06316996

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to AC loads and, more particularly, to adjustable AC loads.
2. Prior Art
Ordinarily, when a resistor load is used on the collector of a transistor, the DC potential on the collector and thus the DC-operating point, the AC gain, and the current through the transistor are not independent. This presents a problem when attempting to operate at low voltage when there is a simultaneous need for high gain, linear operation, optimized DC-current and optimized collector voltage.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention an adjustable AC load structure is provided. The AC load structure is comprised of an AC output impedance circuit and a transistor bias control. The AC output impedance circuit provides an adjustable AC gain output. The transistor bias control is set to a desired bias on the AC output impedance circuit.
In accordance with another embodiment of the present invention an adjustable AC load is provided as a circuit comprising a transistor, an amplifier section, a voltage coupling network, and a feedback network. The transistor is connected in parallel with an impedance, generally a resistor. The amplifier section is connected to the base of the transistor. The voltage coupling network is connected to an input of the amplifier section. The feedback network is connected between the transistor and an input of the amplifier section.
In accordance with one method of the present invention, a method for providing an adjustable AC transistor load to set the DC operating point of a collector of the transistor, an AC-gain of the transistor, and a current through the collector of the transistor, is provided. Comprising steps of; providing an impedance component in parallel with a transistor component; providing a bias control signal to the transistor component; providing an output differential amplifier to the bias control signal; providing a feedback path from a collector of the transistor through an impedance to the differential amplifier; and providing a voltage to an input terminal of the differential amplifier.


REFERENCES:
patent: 5146180 (1992-09-01), Hyakutake
patent: 5345191 (1994-09-01), Tanaka

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