Adhesive composition for semiconductor device and adhesive...

Stock material or miscellaneous articles – Composite – Of epoxy ether

Reexamination Certificate

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C525S093000, C525S098000, C528S106000, C528S123000, C528S124000

Reexamination Certificate

active

06770370

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an adhesive composition for semiconductor devices suitable for mounting semiconductor chips or semiconductor elements on an interposer or a mother board, and an adhesive sheet for semiconductor devices manufactured by laminating the same.
2. Description of the Related Art
As the densities of integration in semiconductor chips increase, the semiconductor package has been evolving from a through hole mount type represented by DIP (Dual In-line Package) to a surface mount type such as QFP (Quad Flat Package), SOP (Small Outline Package) and TCP (Tape Carrier Package), with increasing numbers of pins and decreasing pitch sizes between pins. Along with these developments, the printed circuit board has also evolved from single sided mounting to allow double sided mounting, leading to a dramatic increase in the mounting density.
Moreover, further increases in the density of integration have been achieved by changing the arrangement of the leads of the package from peripheral arrangement to area array arrangement, represented by the BGA (Ball Grid Array) type and the CSP (Chip Scale Package), that has reduced the package size to as small as comparable to the chip size. In step with this evolution of the package for higher mounting density, semiconductor circuits have also been required to operate with ever increasing speeds. Server computers require particularly higher operating speed and higher mounting density.
In Western countries, in particular, higher operating speed has been regarded as the key to higher performance of electronic devices. Higher operating speed can be achieved by decreasing the length of interconnection between devices. With this regard, there has been much attention paid to the flip-chip mounting technology that is capable of making interconnection shorter than that in the CSP, and achieving lower cost through a reduction in the number of manufacturing processes.
In the typical mode of flip-chip mounting, chips are connected by soldering by means of solder bumps provided at the terminals of the chip. This mode has the drawback that stress is generated in the connection interface due to differences in the thermal expansion coefficient between the circuit board and the chip mounted thereon, thus leading to lower reliability of connection, depending on the operating conditions. For the purpose of reducing the stress in the connection interface, a technique has been studied in which the gap between the chip and the circuit board is filled with an underfill. But the filling process leads to disadvantages with regard to productivity and manufacturing cost, and involves the problem of life control required for the underfill which is in a liquid state.
In order to solve these problems, much development efforts are now being directed to a flip-chip mounting technique that uses a bonding material that has anisotropic electric conductivity and a sealing function. In an attempt to increase the operating speed by using this flip-chip mounting technique, a CSP package (flip-chip CSP) has been devised in which semiconductor chips are mounted on an interposer via a bonding material that has anisotropic electric conductivity and a sealing function, instead of the wire bonding connection technique that has been commonly employed. Another promising application of the bonding material described above is MCP (Multiple Chip Package) that incorporates a plurality of semiconductor bare chips or single chip packages which operate as if they were a single LSI.
Such semiconductor packages as CSP and MCP are mounted on a mother board by means of solder balls that are reflowed in an IR reflow furnace, similarly to the conventional packages. However, the use of solders that are free of lead, which has been increasing due to concern over environmental contamination, leads to higher melting temperatures for the solder, thus making it necessary to improve the heat resistance of the package. This trend also imposes the requirement for higher moist heat resistance on the bonding material used in the flip-chip mounting. This is required to prevent the popcorn phenomenon and delamination that occur when the water content contained in the bonding material is evaporated in the IR reflow process. For this purpose, semiconductor manufacturers have been taking such measures as humidity-proof packaging for product shipment, and device mounting plants have been adding processes in which the semiconductor devices are dried in an oven before the mounting process. But the additional cost of humidity-proof packaging and drying the semiconductor devices, and inconvenience in manufacturing operation caused by the need to remove the humidity-proof packaging present new problems to be solved.
From the view point of productivity, it is desired to carry out flip-chip bonding in a shorter period of time. In order to avoid the thermal influence on the semiconductor chip and the circuit board, it is desired to conduct thermocompression bonding at a lower temperature. However, no bonding material to be used in flip-chip mounting has been developed that satisfies the reflow resistance and short-time and low-temperature bonding. The present invention has been made to solve these problems.
BRIEF SUMMARY OF THE INVENTION
An object of the present invention is to provide a bonding material having excellent moist heat resistance, which prevents the popcorn phenomenon and delamination that occur when the water content contained in the bonding material is evaporated in the IR reflow process.
Another object of the present invention is to provide a bonding material which is superior in short-time and low-temperature bonding and is also superior in electrical insulating properties in consideration of connection to the surface to be wired.
The present invention provides an adhesive composition for a semiconductor device, comprising 10 to 30% by weight of a reactive elastomer (A), 40 to 65% by weight of an epoxy resin (B) having two or more glycidyl ether groups, a phenol resin (C) and a curing accelerator (D), wherein a ratio of the epoxy resin (B) to the phenol resin (C) is within a range from 1:0.6 to 1:1 in terms of a functional group equivalent ratio.
The present invention also provides an adhesive sheet for a semiconductor device comprising a layer made of the above adhesive composition for a semiconductor device.
The adhesive composition for the semiconductor device and the adhesive sheet for the semiconductor device of the present invention are preferably used in the flip-chip mounting of semiconductor bare chips.


REFERENCES:
patent: 5160783 (1992-11-01), Nemoto et al.

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