Addressing unit

Details Addressing unit Addressing unit

1997-05-29

1998-12-22

Nguyen, Tan T.

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

3652385, 365236, G11C 800

Patent

active

058525858

ABSTRACT:
In an addressing unit fort reducing a wasteful time created to reach an address latch to attain fast processing, a pre-decoder for pre-decoding an X address and a Y address is provided in a preceding stage to the address latch, the address signal pre-decoded by the pre-decoder is latched in the address latch and the latched address signal is decoded by a decoder. Thus, the pre-decode process can be conducted in the same time period required to latch the address signal in a conventional unit in which the pre-decoder is arranged in a succeeding stage of the address latch circuit, and after the address latching, only the decode process is needed.

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patent: 5629903 (1997-05-01), Agata
patent: 5666323 (1997-09-01), Zagar
patent: 5694370 (1997-12-01), Yoon
patent: 5701273 (1997-12-01), Choi

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