Boots – shoes – and leggings
Patent
1975-09-02
1977-06-21
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 920
Patent
active
040315142
ABSTRACT:
An addressing system in an information processor for accessing to data regularly scattered in the whole memory region, comprising an index register, an adder, an address register, an instruction register, and a circuit which detects information of a portion of an operation part of the instruction register. When the detection output of the detecting circuit is specified information, information of an address part of the instruction register and information of the index register are added by the adder. The result is stored into the address register. After designating an address, the added information is shifted to the index register.
REFERENCES:
patent: 3061192 (1962-10-01), Terzian
patent: 3530439 (1970-09-01), Smith
patent: 3735364 (1973-05-01), Hatta et al.
patent: 3754218 (1973-08-01), Hatta et al.
patent: 3900835 (1975-08-01), Bell et al.
Bartz C. T.
Hitachi , Ltd.
Shaw Gareth D.
LandOfFree
Addressing system in an information processor does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Addressing system in an information processor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Addressing system in an information processor will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-739669