Addressing multiple types of memory devices

Static information storage and retrieval – Addressing – Plural blocks or banks

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36518908, 365 49, 365231, 364200, 371 11, G11C 800, G11C 700, G06F 100, G06F 1100

Patent

active

048992720

ABSTRACT:
The present invention provides a memory addressing system that can accommodate multiple size DRAMS. DRAMS of various sizes can be mixed in a variety of ways. The present invention provides a hardware register associated with each pair of banks of DRAMS. This hardware register is programmable to indicate the type of DRAMS that have been inserted in the particular memory banks and to indicate the starting address of the particular set of memory banks. Using this technique, it is not necessary to insert the largest memory chips in the first memory bank. Memory chips of either size can be inserted in either set of memory banks and the information in the programmable register is used to control circuitry which appropriately modifies the accessing signals which are sent to the memory system.

REFERENCES:
patent: 4752915 (1988-06-01), Suzuki et al.
patent: 4758996 (1988-07-01), Goldman
patent: 4780855 (1988-10-01), Iida et al.
patent: 4809234 (1989-02-01), Kuwashiro

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