Communications: electrical – Digital comparator systems
Patent
1975-12-22
1977-03-22
Yusko, Donald J.
Communications: electrical
Digital comparator systems
340168R, H04Q 900
Patent
active
040140016
ABSTRACT:
An addressable signalling apparatus wherein a shift register may be sequentially advanced through units of address by inputs to an OR gate. Such inputs may come from programmable connectors connected to selected input terminals defining a unique address or from one designated connector which is connected as an input to each of said OR gates defining an address unit substitute. The OR gates are connected in turn to a shift register which, when it sequentially shifts through programmed units of address, activates an output means. Once the output is enabled, a multiplicity of output messages may be transmitted through the apparatus.
The apparatus includes a logic circuit for resetting the shift means in the event an input not corresponding either to the programmed units of address or the common designated substitute address unit is received.
REFERENCES:
patent: 3233221 (1966-02-01), Perlin et al.
patent: 3689887 (1972-09-01), La Falce et al.
patent: 3801742 (1974-04-01), O'Brien et al.
Speed Call Corp.--Bulletin, "An Advanced Design, Solid State Selective Signalling System Compatible with Contemporary Systems and Equipment Incorporating Multiple Frequency Dialing . . . ", 4 pp. c-101, 09-01-69 Speedcall Corp.
Speedcall Corp. Model 501 Publication, 24 pp.
Speedcall Corporation
Yusko Donald J.
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