Addressable buffer circuit with address incrementer independentl

Details Addressable buffer circuit with address incrementer independentl Addressable buffer circuit with address incrementer independentl

1982-07-26

1985-07-02

Springborn, Harvey E.

Boots, shoes, and leggings

G06F 1300, G06F 1304, G06F 1516

Patent

active

045272336

ABSTRACT:
A direct buffer access circuit provides a buffer memory for use with a host central processing unit and a peripheral controller for controlling an external data storage device such as a disk or tape drive. The buffer is connected so that both the host and the controller have direct access to the buffer. The host can thus transfer data to the buffer at its own data rate independently of the transfer rate of the controller. The buffer may include either a random access memory which is addressed by a counter, or a first-in/first-out memory. The buffer is controlled by signals received from either the host or the controller.

REFERENCES:
patent: 3587058 (1971-06-01), Butler
patent: 4122520 (1978-10-01), Adamchick et al.
patent: 4240138 (1980-12-01), Chauvel
patent: 4371932 (1983-02-01), Dinwiddie, Jr. et al.
patent: 4399503 (1983-08-01), Hawley
patent: 4454595 (1984-06-01), Cage
patent: 4481578 (1984-11-01), Hughes et al.

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