Address translator and method of operation

Details Address translator and method of operation Address translator and method of operation

1994-04-04

1996-06-25

Lane, Jack A.

Static information storage and retrieval

Magnetic bubbles

Guide structure

365 49, G06F 1210, G11C 1500

Patent

active

055308228

ABSTRACT:
An address translator (126) translates addresses, acting like a register file or a table, as necessary. The address translator contains a number of entries for matching an input address to a stored tag. An entry outputs a stored translated address if its stored tag matches the input address. A decoder (138) selects a particular entry in which to store an input translated address when the address translator operates as a register file. In these cases, a register number is also stored in the particular entry's as the entry's tag. Later, when it is necessary to read the particular entry, the register number is compared to each entry's tag to find a match. The disclosed address translator is compatible with both hardware and software refill algorithms ("tablewalks") without impacting its critical read speed path.

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Furht et al. "A Survey of Microprocessor Architectures for Memory Management," IEEE Computer, 1987, pp. 48-67.
Baliga Designing with the Virtual Memory 80386, Intel Corporation, pp. 1-5.

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