Address translator

Details Address translator Address translator

1980-02-20

1983-03-22

Thesz, Joseph M.

Boots, shoes, and leggings

G06F 700

Patent

active

043778445

ABSTRACT:
A memory addressing apparatus (1,20,90) is described comprising a circuit (5,26,96) responsive to a current external memory address on an input line (2,21,91) and a signal generated by an auxiliary memory circuit (8,29,93) for providing a current internal address for addressing an internal memory (15,19,101). For maximum program security, the above described components are all located in a single integrated circuit package.

REFERENCES:
patent: 3949378 (1976-04-01), Crabb et al.
patent: 4031514 (1977-06-01), Kihara
patent: 4128875 (1978-12-01), Thurber et al.
patent: 4155119 (1979-05-01), DeWard et al.

Affiliated with

Also associated with

Rating

Address translator does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Address translator, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Address translator will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1871947